M&MA

Testability VLSI: Boundry scan Boundary scan is a test technique using scan methodology, involving digital services,  digital devices, designed with shift registers (scan flip flops) placed between each device pin and the internal logic.    These shift registers can control and observe signal values present at each input and  output pin and are connected together in serial fashion to form a data register chain,  called boundary scan shift register with shift and update stages.

JTAG Test Access Port JTAG Testability: JTAG Test Access Port Controller                                                             The TAP is a general-purpose port that can provide access to many test support functions built into a component, including the test logic defined by this standard. 

Comparison of nmos and pmos operation modes: For many years,  NMOS  circuits were much faster than comparable  PMOS  and CMOS circuits, which had to use much slower p-channel transistors. comparison of nmos and pmos operation modes comparison of nmos and pmos operation modes video:

Difference between Travelling wave tube and klystron: Difference between Travelling wave tube and klystron Travelling wave tube and klystron Video: